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» DVM Test Report: Bode Plot|DC Input|POP-AC
| Test Details | |
| Schematic | 5_multi_tone.sxsch |
| Test | Bode Plot|DC Input|POP-AC |
| Date / Time | 11/17/2016 11:16 AM |
| Report Directory | DVM_REPORTS\2016-11-17-11_12_AM\Bode Plot\DC Input\POP-AC |
| Log File | report.txt |
| Screenshot | schematic.png |
| Status | WARN |
| Simulator | simplis |
| Deck | input.deck |
| Init | input.deck.init |
| Measured Scalar Values | |
| Efficiency | 96.5149% |
| gain_crossover_freq | 9.19732 |
| gain_margin | Unable to determine gain_margin |
| ILOAD | AVG 500.111m MIN 500.079m MAX 500.213m RMS 500.111m PK2PK 134.49u |
| ISRC | AVG 1.81418 MIN 1.81368 MAX 1.81468 RMS 1.81418 PK2PK 1.0038m |
| min_phase | 23.3146 |
| min_phase_freq | 50 |
| phase_crossover_freq | Unable to determine phase_crossover_freq |
| phase_margin | 65.7001 |
| Power(LOAD) | 200.089 |
| Power(SRC) | 207.314 |
| VLOAD | AVG 400.089 MIN 400.063 MAX 400.171 RMS 400.089 PK2PK 107.592m |
| VSRC | AVG 114.274 MIN 114.274 MAX 114.275 RMS 114.274 PK2PK 401.519u |
| Measured Spec Values | |
| Max_VLOAD | PASS: Max. Output1 Voltage (400.171) is less than or equal to Max. Output1 Voltage Spec (420) |
| Min_VLOAD | PASS: Min. Output1 Voltage (400.063) is greater than or equal to Min. Output1 Voltage Spec (380) |
| min_gain_margin | WARN: Unable to determine min_gain_margin |
| min_phase_margin | PASS: Phase Margin (65.7001) is greater than Min. Phase Margin (35) |
 Bode Plot
GAIN
PHASE
|
|
| SXGPH File | simplis_ac1_101.sxgph |
 LOAD
VLOAD
ILOAD
|
|
| SXGPH File | simplis_pop1_72.sxgph |
 SRC
VSRC
ISRC
|
|
| SXGPH File | simplis_pop1_67.sxgph |
| Other SXGPH Files | |
| AC#pop | simplis_pop1_41.sxgph |
| SIGNAL#pop | simplis_pop1_46.sxgph |
| default#51#pop | simplis_pop1_51.sxgph |
| RAMP#pop | simplis_pop1_60.sxgph |
| SIGNAL#log#ac | simplis_ac1_81.sxgph |
| AC#log#ac | simplis_ac1_88.sxgph |
| RAMP#log#ac | simplis_ac1_94.sxgph |
